Protecting your R&D investment with SHA-256 authentication
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Innovation in high speed data converters and demystifying of high speed JESD interconnect
High speed data converters offer superior performance, high input bandwidths and integrated signal processing. But increasing processing speed whilst ensuring desired precision is a challenge often faced by design engineers.
This webinar will discuss such and many other issues in designing critical military, communication and telecom applications. The session will also explain the working of the JESD204B high speed SERDES link designed for high speed converters. Additionally, attendees will benefit from deep insights into different JESD layers, subclasses and definitions. Furthermore, the webinar will focus on the need for such interconnects and discuss common "high-performance metrics" that are associated with high speed serial interfaces.
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A smart processor for the Smart Grid
By Jarry Chang, DFI
In this article, we show how the Intel Atom processor E3800 product family delivers the reliability, security, performance, and efficiency that smart grids require. We also show how DFI is using these processors to power intelligent solutions for smart meters and substation communication systems. These solutions can help utilities leverage the smart grid to optimize energy production and delivery, meet growing demand with fewer power plants, reduce outages, improve customer service, and enhance environmental stewardship.
Quantifying the cost of fixing vs preventing bugs
This white paper helps you to quantify the cost savings bug prevention offers your organization, using formulas inspired by the book "How Google Tests Software" (Whittaker, Arbon, Corollo). You will learn how much your organization spends on fixing and finding bugs, and how to identify the direct costs associated with software defects. By embracing prevention, instead of fixing, your organization can free up valuable engineering resources for innovation and new product development – enabling you to carve out a greater share of the markets you serve.
Industrial network security from the cloud to the connected edge
As industrial systems are increasingly required to add connectivity to perform their basic functions, comprehensive cyber security measures – rooted in both hardware and software – will be critical to guaranteeing not only data security, but the physical integrity of devices themselves.
In response, members of the Intel Internet of Things Solutions Alliance like McAfee and Wind River Systems are leveraging the hardware-assisted security provisions of Intel processors to build software and middleware security solutions for centralized image management, secure network storage, and out-of-band protection – on both sides of the firewall.
Software flexibility brings legacy equipment into the “Connected Factory”
New Sitara processor family brings higher performance with real-time processing
In this Webtalk, Elizabete De Freitas, EMEA Industrial System Applications Manager at Texas Instruments, presents the new Sitara AM437x processor family. This new generation has up to 40 percent more system performance, on-chip quad core PRU co-processor for dual and simultaneous industrial protocol achieving deterministic, direct access to I/Os, ultra-low-latency requirements and is also for real-time processing. This new family is suited for applications such as industrial automation and industrial drives and all types of equipment providing a Human Machine Interface. It also includes features such as a dual camera and QSPI. Additional highlights are detailed at www.ti.com/am437xevm and www.ti.com/am437x-tidesign
High Integrity C++ (HIC++) coding standard - for the production of high quality code
Download a copy of the HIC++ coding standard, one of the longest established and most widely adopted coding standards for the C++ language. This major update (V4.0) now covers C++'11 advice and consolidates other current coding best practices.
This document defines a set of rules for the production of high quality C++ code. The guiding principles of this standard are maintenance, portability, readability and robustness. Justification with examples of compliant and/or non-compliant code are provided for each rule. Each rule shall be enforced unless a formal deviation is recorded.
This standard adopts the view that restrictions should be placed on the use of the ISO C++ language without sacrificing its core flexibility. This approach allows for the creation of robust and easy to maintain programs while minimizing problems created either by compiler diversity, different programming styles, or dangerous/confusing aspects of the language.
Achieving high-performance graphics and high energy efficiency for avionics systems
This White Paper is presented by AMD
To achieve new levels of graphics performance, designers of avionics systems are increasingly transitioning away from FPGA and DSP platforms in favor of more versatile, higher-performing embedded GPUs. These are optimized to handle high-speed multimedia processing as well as the massive parallel processing required for tasks like radar processing, object recognition, 3-D mapping and video manipulation.
Established leaders in this domain like CoreAVI and Curtiss Wright are working together to leverage the processing speed and power efficiency of AMD Embedded Radeon E8860 GPUs and open standard initiatives like OpenGL and FACE to break new barriers in cockpit electronics and display performance.
Protecting your R&D investment with secure authentication
By Scott Jones, Maxim Integrated
In the age of identity theft and faked IDs, achieving positive identification is of paramount importance. This is not only true for individuals, but also applies to electronic products. Manufacturers of nearly all equipment types need to protect their products against the counterfeit components that aftermarket companies will attempt to introduce into the OEM supply chain. Secure authentication provides a strong electronic solution to address this threat as well as additional useful end-product features.
Software-Defined Radio (SDR): rapid system developing, prototyping and integration
This webinar focusses on SDR rapid system development, prototyping and integration. It shows how to use a stand-alone system for rapid validation of designs by incorporating a kernel subsystem (IIO) for the converters. This eliminates the immediate necessity of expensive equipment. The seminar takes a dive in how to model a design - from MATLAB simulation onto hardware implementation and realization.
Industrial signal level data acquisition circuit optimized for fast channel-to-channel switching
This Circuit Note introduces a high performance industrial signal level multichannel data acquisition circuit that has been optimized for fast channel-to-channel switching. It can process 16-channels of single-ended inputs or 8-channels. As all "Circuits from the Lab" from Analog Devices, this reference circuit is engineered and tested for quick and easy system integration.
A single channel can be sampled at up to 1.33 MSPS with 18-bit resolution. A channel-to-channel switching rate of 250 kHz between all input channels provides 16-bit performance. The signal processing circuit combined with a simple 4-bit up-down binary counter provides a simple and cost effective way to realize channel-to-channel switching without an FPGA, CPLD, or high speed processor.