Should you buy a module or build your own integrated design?
Don’t miss the Webinar that helps you calculate the costs and resources involved with buying vs. designing from scratch. New product features, certification, increased performance and quicker design
cycles are pressuring device manufacturers to reduce costs and still meet their time to-market requirements. One option is using MCU-based modules with production-ready BSPs and possibly eliminating development time and saving on design and manufacturing costs.
This webinar will show you how to use the Buy vs. Build on-line calculator to help you navigate the steps (and costs) involved with building the project including:
At the completion of this 30-minute free webinar you will emerge with the knowledge to accurately calculate whether to buy an embedded module or build an integrated system in-house. PLUS: you can down-load the calculator on your computer as a free gift from us for attending!
Luis Torric is a Converge Promotions FAE, specializing in technical support for the embedded modules division. Luis Torrico has also worked as Director of Engineering for an embedded modules design and manufacturing company based in Rhode Island for 10 years.
Wolfgang Heinz-Fischer is the head of marketing for TQ Systems in Germany. He has worked for some of the industry’s leading board manufacturers, and is an acclaimed speaker and author of numerous whitepapers and technical articles on embedded modules, standards, and the industry.
Date & Time
October 30, 2014
Attend this Webcast and receive a free downloadable version of the calculator. Register now!
Re-think surveillance performance and integration
Network video recorders (NVRs) are typically network-based computers that take video feeds from multiple cameras simultaneously and record the video in a digital format onto one or more hard drives. They offer an excellent alternative for smaller DSS installations that don’t need the storage capacity of a storage area network. This white paper looks at Milestone Systems’ line of Husky NVRs and how they use Intel Core i5/i7 processors.
Modular SIL 4-certifiable system platform for safety-critical public transportation applications
In the last years, the government in many countries have increased their safety standards to provide more safety in public transportation. Many controllers that are currently on the market don‘t fulfill the requirements and need additional and often expensive safety devices. In this Webinar MEN show you how to cover all requirements from the beginning with just a single system.
Date & Time
Protecting your R&D investment with SHA-256 authentication
Innovation in high speed data converters and demystifying of high speed JESD interconnect
High speed data converters offer superior performance, high input bandwidths and integrated signal processing. But increasing processing speed whilst ensuring desired precision is a challenge often faced by design engineers.
This webinar discussed such and many other issues in designing critical military, communication and telecom applications. The session explained the working of the JESD204B high speed SERDES link designed for high speed converters. Additionally, attendees learned more from deep insights into different JESD layers, subclasses and definitions. Furthermore, the webinar focussed on the need for such interconnects and discuss common "high-performance metrics" that are associated with high speed serial interfaces.
A smart processor for the Smart Grid
By Jarry Chang, DFI
In this article, we show how the Intel Atom processor E3800 product family delivers the reliability, security, performance, and efficiency that smart grids require. We also show how DFI is using these processors to power intelligent solutions for smart meters and substation communication systems. These solutions can help utilities leverage the smart grid to optimize energy production and delivery, meet growing demand with fewer power plants, reduce outages, improve customer service, and enhance environmental stewardship.
Quantifying the cost of fixing vs preventing bugs
This white paper helps you to quantify the cost savings bug prevention offers your organization, using formulas inspired by the book "How Google Tests Software" (Whittaker, Arbon, Corollo). You will learn how much your organization spends on fixing and finding bugs, and how to identify the direct costs associated with software defects. By embracing prevention, instead of fixing, your organization can free up valuable engineering resources for innovation and new product development – enabling you to carve out a greater share of the markets you serve.
New Sitara processor family brings higher performance with real-time processing
In this Webtalk, Elizabete De Freitas, EMEA Industrial System Applications Manager at Texas Instruments, presents the new Sitara AM437x processor family. This new generation has up to 40 percent more system performance, on-chip quad core PRU co-processor for dual and simultaneous industrial protocol achieving deterministic, direct access to I/Os, ultra-low-latency requirements and is also for real-time processing. This new family is suited for applications such as industrial automation and industrial drives and all types of equipment providing a Human Machine Interface. It also includes features such as a dual camera and QSPI. Additional highlights are detailed at www.ti.com/am437xevm and www.ti.com/am437x-tidesign
High Integrity C++ (HIC++) coding standard - for the production of high quality code
Download a copy of the HIC++ coding standard, one of the longest established and most widely adopted coding standards for the C++ language. This major update (V4.0) now covers C++'11 advice and consolidates other current coding best practices.
This document defines a set of rules for the production of high quality C++ code. The guiding principles of this standard are maintenance, portability, readability and robustness. Justification with examples of compliant and/or non-compliant code are provided for each rule. Each rule shall be enforced unless a formal deviation is recorded.
This standard adopts the view that restrictions should be placed on the use of the ISO C++ language without sacrificing its core flexibility. This approach allows for the creation of robust and easy to maintain programs while minimizing problems created either by compiler diversity, different programming styles, or dangerous/confusing aspects of the language.