microMIPS instruction set architecture - 32-bit performance, but low system cost - Chips & Components

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microMIPS instruction set architecture - 32-bit performance, but low system cost

This White Paper is presented by MIPS

Content such as digital video requires uncompromised performance. The answer is a media-capable microprocessor at the core of the product that is architected for low system cost, low power, and application acceleration. The new microMIPS architecture delivers 32-bit performance along with the memory footprint of a 16-bit device – minimizing system memory and ultimately silicon and system cost.

The transition to digital representation of all media has completely transformed the home. Where we once had analog TV tuners and CD-centric music systems, we now have digital set-top boxes, media players that stream Internet content, and home network gear that would have found its only use in the enterprise a few years ago. Engineering teams contemplating the design of a connected device are faced with an incredibly tough balancing act. Content such as digital video requires uncompromised performance. Meanwhile the consumer demands low cost and high quality. The only answer is a media-capable microprocessor at the core of the product that is architected for low system cost, low power, and application acceleration. The new microMIPS architecture delivers uncompromised, 32-bit performance along with the memory footprint of a 16-bit device – minimizing system memory and ultimately silicon and system cost...

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